| PART |
Description |
Maker |
| CY7C1470V25 CY7C1470V25-167ACES CY7C1470V25-167AXC |
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL?/a> Architecture
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture
ECONOLINE: RQS & RQD - 1kVDC Isolation- Internal SMD Construction- UL94V-0 Package Material- Toroidal Magnetics- Efficiency to 80%
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBLArchitecture 4M X 18 ZBT SRAM, 3.4 ns, PQFP100
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBLArchitecture 4M X 18 ZBT SRAM, 3.4 ns, PBGA165
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBLArchitecture 4M X 18 ZBT SRAM, 3 ns, PBGA165
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBLArchitecture 1M X 72 ZBT SRAM, 3 ns, PBGA209
ECONOLINE: RQS & RQD - 1kVDC Isolation- Internal SMD Construction- UL94V-0 Package Material- Toroidal Magnetics- Efficiency to 80% 2M X 36 ZBT SRAM, 3.4 ns, PBGA165
|
Cypress Semiconductor Corp.
SRAM
Cypress Semiconductor, Corp.
|
| K4D26323AA-GL |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| W9725G6JB25I |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| W631GG6KB-15 W631GG6KB12A W631GG6KB12I W631GG6KB12 |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| IS61LPD25636A-250B2 IS61LPD25636A-250B2I IS61LPD25 |
256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM
|
Integrated Silicon Solution, Inc.
INTEGRATED SILICON SOLUTION INC
|
| IS61VPD102418A-250TQ IS61VPD102418A-250TQI IS61VPD |
512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM 1M X 18 CACHE SRAM, 2.6 ns, PQFP100
512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM 512K X 36 CACHE SRAM, 2.6 ns, PBGA165
|
Integrated Silicon Solution, Inc.
INTEGRATED SILICON SOLUTION INC
|
| IS61VPD51236A IS61VPD51236A-200B3 IS61VPD51236A-20 |
512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM
|
ISSI[Integrated Silicon Solution, Inc]
|
| IS61VPD25636A-200TQ2I IS61VPD51218A-200B2I |
256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM 256K X 36 CACHE SRAM, 3.1 ns, PQFP100
256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM 512K X 18 CACHE SRAM, 3.1 ns, PBGA119
|
Integrated Silicon Solution, Inc.
|
| EM42AM1644RTA-5FE EM42AM1644RTA-6FE EM42AM1644RTA- |
Double DATA RATE SDRAM
128Mb (2M】4Bank】16) Double DATA RATE SDRAM
128Mb (2M隆驴4Bank隆驴16) Double DATA RATE SDRAM
128Mb (2M?4Bank?16) Double DATA RATE SDRAM
128Mb (2M×4Bank×16) Double DATA RATE SDRAM
|
Eorex Corporation
|
| DDR110-56T7RL DDR110-XXT7RL DDR110-27T7RL |
10-LINE 56 ohm OTHER TERMINATOR, PDSO24
DOUBLE DATA RATE TERMINATION NETWORK WITH DISABLE SWITCH 双倍数据速率终端网络具有禁用开
DOUBLE DATA RATE TERMINATION NETWORK WITH DISABLE SWITCH
|
STMicroelectronics N.V.
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| CY7C1372CV25-167AI CY7C1372CV25-167BGI CY7C1372CV2 |
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 3 ns, PQFP100
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 3 ns, PBGA165
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 3 ns, PBGA119
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 2.8 ns, PBGA119
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 1M X 18 ZBT SRAM, 2.8 ns, PBGA165
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3 ns, PBGA165
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3 ns, PQFP100
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3.4 ns, PQFP100
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 512K X 36 ZBT SRAM, 3.4 ns, PBGA165
512K x 36/1M x 18 Pipelined SRAM with NoBLArchitecture 12k × 36/1M × 18流水线的SRAM架构的总线延迟
CAP,Ceramic,10000pF,500VDC,10-% Tol,10% Tol,X7R-TC Code,-15,15%-TC,30ppm-TC RoHS Compliant: Yes
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
|
Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
|
